US5075842
(Ab)
"A tag bit is associated with each word stored in a memory. When the tag bit is a 0 the word is a data word and when a 1 the word is a valid access descriptor. Access descriptors include an object index for selecting an object in the address space of the memory, and a rights field specifying the permissible operations on a paged object selected by the access descriptor. An access descriptor in a processor control block contains a tag enable bit. An object table has stored therein(*記憶している)object descriptors for use by an addressing mechanism in forming physical addresses to the page table object. The page table has stored therein page table entries for use by the addressing mechanism in forming physical addresses to the paged object. One of the access descriptors in a process control block contains an execution mode bit which represents either a user mode or a supervisor mode. Logic asserts the tag signal upon the condition that the tag enable bit is in the disabled state and the execution mode bit is set to supervisor mode. Logic responds to the tag signal and compares the page rights field of the page table entry with the rights field of the access descriptor and asserts a fault if the access permitted by the page rights field is inconsistent with the rights field of the access descriptor."
US2014270682
"1. A method of configuring a computing device in a network of at least one remote device, comprising:
storing, in a remote device, a configuration data archive relating to an existing computing device;
determining, by a computing device to be configured, whether the remote device has stored therein(*記憶している)a configuration data archive; and
in response to a determination that the remote device has stored therein a configuration data archive, transferring data from the configuration data archive to the computing device to be configured."
US6085180
"Printhead module 5 includes printhead 33, a printhead driver 37, a drawing engine 39 (which can be a microprocessor or an Application Specific Integrated Circuit (ASIC)), a microprocessor 41 and a non-volatile memory 43. NVM 43 has stored therein(*記憶している)image data of the fixed indicia and image data for each individual font that can be required as part of the variable data. Microprocessor 41 receives a print command, postage amount, and date via the transaction microprocessor 9. The postage amount and date are sent from microprocessor 41 to the drawing engine 39 which then accesses nonvolatile memory 43 to obtain image data therefrom which is then downloaded by the drawing engine 39 to the printhead driver 37 in order to energize individual printhead elements 33a to produce a single column dot pattern of the indicia. The individual column-by-column generation of the indicia is synchronized with movement of printhead 33 until the full indicium is produced."
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