US2018323373
[0016] A capacitive sensor as disclosed herein and as used in embodiments disclosed herein may be formed from a comb that includes a plurality of conductive electrodes connected to a common bus.
【００１６】
本明細書中に開示され、本明細書中に開示される実施形態で使用される静電容量センサは、共通バスに接続されている複数の導電性電極を含むコームから形成されることができる。
In some embodiments, a capacitive sensor as disclosed herein may include another plurality of conductive electrodes connected to a second common bus separate from the common bus of the first plurality of electrodes,
幾つかの実施形態においては、本明細書中に開示される静電容量センサは、前記第１の複数の電極の前記共通バスとは異なる第２の共通バスと接続されている他の複数の導電性電極を含むことができ、
with the second plurality of electrodes being interdigitated with the first plurality of electrodes.
前記第２の複数の電極は、前記第１の複数の電極と櫛歯状となっている（ｉｎｔｅｒｄｉｇｉｔａｔｅｄ）。
In some configurations, the combs may be placed in relatively close proximity but not immediately interdigitated;
幾つかの構成においては、コームは、比較的近接して置かれることができるが、直に接して櫛歯状になることはない。
for example, the second comb may be placed an electrode-width behind the first relative to a direction of movement of the assembly and substrate, and laterally offset from the first, such that the combs would be interdigitated if aligned laterally.
例えば、前記第２のコームは、アセンブリ及び基板の移動方向に対して第１より１つの電極幅分後方に配置され、側方向に並べられている場合コームが櫛歯状になるように前記第１から側方向にずれていることができる。
The two combs may be driven in phase during operation of the OVJP apparatus.
２つのコームは、前記ＯＶＪＰ装置の操作中、同調して駆動されることができる。
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[0021] FIG. 5 shows an example of a capacitive position sensor with a single comb according to an embodiment disclosed herein.
【図５】図５は、本明細書中に開示される実施形態における単一のコーム（組み合わせていない、inter-じゃない）を有する静電容量位置センサの例を示す。
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[0065] FIG. 5 shows a top schematic view of a capacitive distance sensor according to embodiments disclosed herein, looking down from the OVJP deposition assembly (not shown) toward a substrate on which material is to be deposited. The sensor may include of an array of conductive electrode stripes 501 . The strips may be made of a thin film metal and referred to collectively as a comb. The stripes of such a comb may be deposited by ay suitable technique, including electroplating, physical vapor deposition, aerosol printing, or the like. The comb is disposed above an electrically insulating layer 502 formed of plastic, glass, ceramic, or the like, or combinations thereof.
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[0022] FIG. 6 shows an example of a capacitive position sensor with two interdigiated combs according to an embodiment disclosed herein.
【００２２】
【図６】図６は、本明細書中に開示される実施形態における２つの櫛歯状になったコーム（＊？）を有する静電容量位置センサの例を示す。
//////[0068] FIG. 6 shows a top schematic view of another capacitive distance sensor according to embodiment disclosed herein, which includes multiple interdigitated combs. Specifically, in this arrangement, two interdigitated combs 601 are arranged so that an electrode from each comb straddles a trace 501 below the combs. Each of the two combs is connected to a separate bus 602 . Thus, the arrangement includes two comb components in electrical connection with separate buses that are electrically insulated from one another.
＊当業者には別に謎でも何でもないのかも知れませんが、interdigitated combsの訳語としての「櫛歯状になったコーム（櫛）」って何？
櫛歯状なのが櫛、櫛だから櫛歯状、櫛＝櫛歯状では？芸能人は歯が命！トートロジー、同語反復って奴？櫛歯状じゃなかった櫛が、成長して櫛歯状になったのか？
interdigital, interdigitatedの訳語は「交差指（状）」、「組み合わせた指形の」、「組み合わせた」とかで良いんじゃ？
そもそもinterdigital, interdigitatedの訳語として「櫛歯状」が業界標準？
櫛歯状電極（2020年3月3日記事参照）
US9952082
[0043] Turning to an alternative embodiment of a level sensor label 1000 ,
【００２９】
レベルセンサラベル１０００の別の実施形態に目を向けると、
provided is a capacitive structure 1002 , where the capacitive structure is an inter-digitated structure including pairs of horizontally oriented strips 1004 a , 1004 b through 1004 x and 1004 y .
水平方向を向いた帯１００４ａ、１００４ｂ～１００４ｘ、および１００４ｙのペアを備える櫛歯状の構造である容量構造１００２が提供される。
US2018329493
[0036] In an example, one or more of the nanoscale electrodes deposited on the target surface
【００２８】
一例では、標的表面上に付着された１つ以上のナノスケール電極は、
is a film layer having interdigitated electrodes, such as film layer 350 with electrically conductive interdigitated electrodes 350 a and 350 b in an electrically non-conductive material 350 c as shown in FIG. 3.
図３に示されるように、非導電性材料３５０ｃにおいて導電性櫛歯電極３５０ａ及び３５０ｂを備えたフィルムレイヤ３５０等の櫛歯電極を有するフィルムレイヤである。
In an example, one or more of the nanoscale electrodes deposited on the target surface is an electrode, such as electrode 450 shown in FIG. 4.
一例では、標的表面上に付着された１つ以上のナノスケール電極は、図４に示されている電極４５０等の電極である。
The pair of comb-shaped electrodes oppose each other such that the plurality of electrode fingers are interdigitated with each other.
上記一対の櫛形電極は、複数の電極指が互いに間挿（＊これなら納得）し合うように対向している。
[0140] In some embodiments, the humidity sensor 610 can be a capacitor which includes spaced-apart comb-like electrodes, such as the interdigitated electrodes 612 , 614 shown in FIG. 6A.
【０１００】
いくつかの実施形態において、湿度センサ６１０は、離間した櫛状電極、例えば図６Ａに示す交差指電極６１２、６１４を備えるキャパシタであってよい。
Resistivity Test
【０１８２】
抵抗試験
The resistivity of conductive polymer films cast from the dispersions were measured using ITO interdigitated electrodes on glass substrates.
ガラス基板上のＩＴＯ交差指電極（ｉｎｔｅｒｄｉｇｉｔａｔｅｄ ｅｌｅｃｔｒｏｄｅ）を用いて、分散体から成型された導電性ポリマー膜の抵抗を測定した。
US6960476
Techniques for screen-printing substrates with the electrodes and chemo/electro-active materials are illustrated in FIGS. 2-3. FIG. 2 depicts a method of using interdigitated electrodes overlaid with dielectric material, forming blank wells into which the chemo/electro-active materials can be deposited.
US6960476
Array Chip Fabrication
【００６０】
Ａ．アレイチップの作製
A blank array chip was made by screen printing an interdigitated electrode pattern, shown in FIG. 2, onto an alumina substrate (obtained from Coors Tek, 96% alumina, 1''*0.75''*0.025'').
図２に示されている交差指電極パターンをアルミナ基材（Ｃｏｏｒｓ Ｔｅｋから入手、９６％アルミナ、１”×０．７５”×０．０２５”）上にスクリーン印刷することにより、ブランクアレイチップを作製された。
US9219221(JP)
[0075] That is, the piezoelectric actuator 31 of the present embodiment has a prismatic piezoelectric element body 32 made of a PZT material in the same manner as in the first embodiment.
【００４０】
すなわち、本実施の形態の圧電アクチュエータ３１は、第１の実施の形態と同様にＰＺＴ材からなる角柱状の圧電素子本体３２を有する。
On four side surfaces of this piezoelectric element body 32 , interdigital electrodes α 2 , β 2 , γ 2 and δ 2 are provided, respectively.
この圧電素子本体３２の４側面には、交差指電極α２，β２，γ２，δ２がそれぞれ設けられている。
These interdigital electrodes α 2 , β 2 , γ 2 and δ 2 are constituted of comb teeth-like interdigital right electrodes α 2 a , β 2 a , γ 2 a and δ 2 a , and comb teeth-like interdigital left electrodes α 2 b , β 2 b , γ 2 b and δ 2 b , respectively
これらの交差指電極α２，β２，γ２，δ２は、それぞれ櫛歯状の交差指右側電極α２ａ，β２ａ，γ２ａ，δ２ａと櫛歯状の交差指左側電極α２ｂ，β２ｂ，γ２ｂ，δ２ｂよりなる
( FIG. 10B only shows the interdigital right electrode α 2 a and the interdigital left electrode α 2 b of the interdigital electrode α 2 ).
（図１０Ｂ中には交差指電極α２の交差指右側電極α２ａと交差指左側電極α２ｂのみを示す）。
US6752635
Embodiments of the present invention are directed to an LGA socket assembly that has its power delivery area and signal delivery area segregated based socket contact design. The contacts positioned in the signal delivery area may be known LGA contacts. The contacts positioned in the power delivery area are comb-shaped contacts according to embodiments of the present invention in which the contact pins and pads are ganged together using a cross beam. The result is an LGA socket assembly with shorter channels, tighter pitches, lower contact resistances, higher current carrying and power delivery capabilities, and potentially a lower pin/pad counts than in known LGA socket assemblies.
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The contact 206 includes at least one contact pads 238 and at least two contact pins 240 ganged using a crossbeam 242 to give the contact 206 a comb shape. The contact 206 fits into a slot 244 in the power delivery area 226 of the socket body 204, solders to a solder pad 246, and mates with a single land 248.
US7381577
FIGS. 4A-4B illustrate a pair of interdigitated opposing comb-shaped gate stacks 402, 404 and a serpentine gate stack 406 between comb-shaped gate stacks 402, 404. Source-drain regions 408, 410 are formed between the gate stacks 402 and 406, 404 and 406, respectively. The source-drain region 408 is continuous from 412 through 414 so that gate stacks 402 and 406 oppose each other across the source-drain region 408. Similarly, source-drain region 410 extends itself continuously from 416 through 418 such that the gate stacks 404 and 406 oppose each other across the entire source-drain region 410. The combination of the interdigitated opposing comb-shaped gate stacks 402, 404 and the serpentine gate electrode stack 406 is shown as a preferable area for performing leakage current measurements, since kerf 490 is more susceptible to silicon erosion. However, a simpler structure such as a pair of a gate stacks and source-drain region may also be advantageously used depending on the susceptibility desired.
（それぞれの櫛歯状comb-shapedが組み合わせられて交差指形interdigitatedになっている）
