US10403268(INTEL IP CORP [US])
[0026] The posterior probabilities can be computed based on the frame terms (or frame values). Thus, the probabilities of each acoustic model state at the output of an acoustic model given a single frame term can be computed for each frame term in an utterance using acoustic model activation values at the output acoustic model states. Each frame term is inputted into（＊に入力する）an acoustic model separately so that multiple acoustic model activation states are formed for each frame term.
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[0034] The acoustic score unit 310 uses an acoustic model where the input frame value is input to（＊に入力する）the model one at a time. The acoustic model has one or more output acoustic model states, and activation values are determined for each of the states in order to compute acoustic scores for phonemes. Specifically, the DNN is trained so that the output layer node corresponding to a given phoneme HMM state is more activated when an input speech frame known to be that phoneme HMM state (from labeled training data) is input into the DNN. The most active node of the output layer is the classification of that frame, and the distribution over all the nodes of the output layer gives (or can be turned into) the probability distribution of the states/classes for that frame. The activations of these DNN output layer nodes vary based on the input speech frame given as input to（＊への入力）the DNN at the acoustic model. The acoustic score unit 310 then provides these acoustic scores in the form of activation values to the decoder 312 .
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[0039] The posterior confidence score unit 322 also may have a posterior probability unit 326 that reads the phoneme order, and in turn, frame term order, of an utterance sequence being processed at the decoder, and then computes a posterior probability using a log of a softmax normalization equation by one example. This may include using the activation values for each output acoustic model state in an acoustic model each time a frame term is inputted to the acoustic model.
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[0086] Process 800 may include “receive frame values of frame terms” 802 . As mentioned above, this may include receiving frame values that were input into an acoustic model used to provide phonemes with acoustic scores. The frame values each correspond to a frame term of a single frame as described above.
US9137084(INTEL CORP [US])
[0024] FIG. 1 depicts a functional block diagram of a segmented Digital-to-Time Converter (DTC) 100 according to the subject matter disclosed herein that can be used as part of a Digital Polar Transmitter (DPTX) architecture. DTC 100 includes a coarse-delay generating segment 101 and a fine-delay generating or segment 102 . Coarse-delay segment 101 comprises a Tapped Delay Line (TDL) 105 , and an Even/Odd Phase Multiplexer (E/O MUX) 107 . Fine-delay segment 102 comprises a digitally controlled edge interpolator (DCEI) 108 . A local oscillator (LO) 103 outputs an LO signal 104 that is input to TDL 105 . A phase-modulation input value that is to be modulated onto LO signal 104 is input to a control logic 106 . Control logic 106 processes and separates the phase modulation input value into a group of coarse delay/phase control bits and a group of fine delay/phase control bits. The coarse delay/phase control bits are input to E/O MUX 107 and control the specific even or odd phase signals that are respectively output from the Even Phase Output and from the Odd Phase Output. The Even and Odd Phase Outputs are respectively input to the IN 1 and IN 2 inputs of DCEI 108 . The fine delay/phase control bits output from control logic 106 are input to DCEI 108 and control the interpolation between even and odd phases input to IN 1 and IN 2 of the fine delay/phase output signal OUT.
US9542561(INTEL CORP [US])
[0006] These SHA2 hash algorithms allow computing a message digest representing a condensed representation of input data referred to as a message. When a message with a length less than 2^64 bits (for SHA-224 and SHA-256) or less than 2^128 bits (for SHA-384 and SHA-512) is input to the hash algorithm, a result called a message digest is output. The message digest is also sometimes referred to as a digest or a hash. The message digest is 224-bits for SHA-224, 256-bits for SHA-256, 384-bits for SHA-384, or 512-bits for SHA-512. SHA-224 and SHA-256 are based on a 32-bit word length. SHA-384 and SHA-512 are based on a 64-bit word length.
US2018068653(INTEL IP CORP [US])
[0039] The posterior confidence score unit 322 also may have a posterior probability unit 326 that reads the phoneme order, and in turn, frame term order, of an utterance sequence being processed at the decoder, and then computes a posterior probability using a log of a softmax normalization equation by one example. This may include using the activation values for each output acoustic model state in an acoustic model each time a frame term is inputted to the acoustic model.
US7570659(INTEL CORP [US])
[0030] In greater detail, again referring to FIG. 6, the serial data being outputted from the elastic buffer 620 is inputted to both the comma detector 630 and the register chain consisting of register- 0 , register- 1 , register- 2 , . . . , register-N. The outputs of the registers are fed to the multiplexer 660 whose output Data x is the skew corrected data output of the lane. The multiplexer selects the appropriate output based on the value of the lane tolerance counter. The output of register- 0 is the output of the elastic buffer after having been delayed by one clock period. Similarly, the output of register- 1 is the output of the elastic buffer after having been delayed by two clock periods and the output of register-N is the output of the elastic buffer after having been delayed by (N+1) clock periods.
US10664750(GOOGLE INC [US])
[0026] Furthermore, in some implementations in which the condition prediction model is used to provide predictions regarding the future occurrence of adverse conditions, the imagery that is input into such model to receive predictions can be accompanied by information sufficient to determine a time (e.g., date) at which each of such input images were captured. As one example, one or more images and one or more respective times at which such images were respectively captured can be input into the condition prediction model. Inclusion of input information regarding the time of capture of images can enable the condition prediction model to more accurately and precisely predict when a projected future occurrence of the adverse condition may likely occur. In some implementations, the time of capture information may simply indicate an amount of time that elapsed between each respective pair of sequential images in a time-sequence of imagery and an amount of time that has elapsed since the most recent of such images (e.g., rather than specifying a particular objective time or date of capture).
US9234246(GOOGLE INC [US])
[0033] In one embodiment, stage 305 comprises diode D2 , resistor R1 , zener diode Z2 (e.g., a 3 V zener diode), microprocessor 307 , resistor R2 , a switch S1 , a diode D3 , and a relay. The combination of the diode D2 , resistor R1 , and zener diode Z2 converts the 120 V AC into a digital signal that can be managed by the microprocessor 307 . In one embodiment, the combination of the diode D2 , resistor R1 , and zener diode Z2 outputs an oscillating voltage between 0V and 3 V. When the 120 V AC input voltage is above 3 V, diode D2 conducts and the zener diode Z2 holds the voltage at 3 V due to the 3 V voltage drop across the zener diode Z2 . When the 120 V AC input voltage is below 3V, the diode D2 stops conducting and 0 V is inputted into the microprocessor 307 . Thus, the combination of the diode D2 , resistor R1 , and zener diode Z2 converts the 120 V AC into a digital signal that alternates between a 0 V and 3 V in the form of a square wave.
US9116529(GOOGLE INC [US])
[0071] FIG. 6B is a schematic of high voltage low dropout voltage regulators used to provide bootstrap power and battery, according to some embodiments. The bootstrap LDO circuitry 680 , and battery LDO circuitry correspond to the bootstrap LDO 380 and battery LDO 382 in FIG. 3 respectively. Rectified input 624 is input to bootstrap circuit 680 . According to some embodiments, regulator 670 is low-dropout linear regulator such as the TPS79801 from Texas Instruments. The output power 690 is provided to the backplate at 3.0V. The bootstrap disable signal 680 can be used to disable the bootstrap power unit, as shown. The input 660 comes from VCC main, which can be, for example, from the rechargeable battery. According to some embodiments, the low dropout regulator 662 is a low quiescent current device designed for power-sensitive applications such as the TLV70030 from Texas Instruments.
US10848389(GOOGLE LLC [US])
[0065] The set of network connected devices each with an assigned device type and at least one or more device priority values is inputted to the device prioritization scheme function ( 404 ). For example, the input list for the above-mentioned example includes: medical device/high device priority value, appliance/low device priority value, and media device/medium device priority value. The device priority values can be rated on many different scaling systems including a rating of X out of Y (e.g., 3 out of 10), threshold levels (e.g., low/medium/high), or the like.
US8327282(GOOGLE INC [US])
[0030] To select one of the keys from the extended keyboard, the user may release the contact with the user interface at the location associated with the desired key. In the example, the extended key where the user releases the contact, as shown in screen 115 , is an “&” key. After the user releases the contact, the selected character is entered into the e-mail application, as shown in screen 120 .
US8930233(APPLE INC [US])
[0105] Continuing with the eBay example above, a user would like to be made aware of a rare antique table as soon as it becomes available in the eBay database. This disclosure, and the parent applications this is a continuation in part for, provide real time activation of data as soon as is entered into the deliverable content database, and real time delivery of the data to eligible receiving devices with the applicable configured situational location(s).
US2020359204(APPLE INC [US])
[0113] In one embodiment, the parent device 710 and the child device 720 can exchange machine information data ( 727 ) via an authentication framework 730 on each device, as described above in FIG. 7A. Additionally, a prompt ( 712 ) for a username and password, or other credentials, can be displayed on the parent device 710 on behalf of the child device 720 . The username and password for the account to use on the child device 720 is entered on（＊上で入力）the parent device 710 due to the ease of use of the parent device 710 for credential entry relative to the child device 720 .
