US7381606
"The trade-off between （兼ね合い、トレードオフ）the on-state voltage drop and turn-off losses is commonly done in power devices by adjusting the lifetime of the charge carriers in the whole of the drift layer. This however tends to reduce severely the charge in the whole of the n-drift layer leading to a poor trade-off between on-state losses and switching losses."
US6740912
"To this end, the relatively complex processing sequences needed to form LDD structures, which are considered a necessary trade-off （犠牲、代償）in conventional short channel length devices, are unnecessary in the present invention."
US4458287
"In prior devices, without the noted nonsymmetrical leakage characteristics, one must tolerate the trade-off between protective shunting and phase control accuracy in AC gate applications."
US8022447
"The energy filter can be "tuned" in terms of certain characteristics, including energetic width and position, in order to achieve a desired trade-off between high on-state current and low off-state leakage (and steep inverse subthreshold slope) in the device."
US7015054
"their light transmission characteristics tend to trade-off against （犠牲にする）electrical operating efficiency"
"These conditions result in a trade-off between series resistance and light extraction efficiency and serve to limit the electrical-to-optical power conversion efficiency of the LED."
US5684390
"There is a trade-off between performance and reject rate."
Fip chip, Wikipedia
"Flip chip, also known as controlled collapse chip connection or its abbreviation, C4,[1] is a method for interconnecting semiconductor devices, such as IC chips and microelectromechanical systems (MEMS), to external circuitry with（用いて）solder bumps that have been deposited onto（堆積）the chip pads. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount（搭載）the chip to external circuitry (e.g., a circuit board or another chip or wafer), it is flipped over so that its top side faces down, and aligned so that its pads align with（一致、整列）matching（対応）pads on the external circuit, and then the solder is reflowed（リフロー）to complete the interconnect（相互接続）. This is in contrast to wire bonding, in which the chip is mounted upright and wires are used to interconnect the chip pads to external circuitry."
US5583378
"In well region 236, integrated circuit chip 202 is surrounded by interconnection substrate 208. Interconnection substrate 208 is a multi-layer printed circuit board laminate（積層体）. Insulating layers 214 can be made of（作る、作製）prepreg layers created（作製、得る）with bizmaleimide triazine (BT) resin materials using printed circuit board fabrication methods well known to those of skill in the art. BT prepreg layers are available from Mitsubishi Gas and Chemical Company of Japan. Conductive trace layers 212 are created by methods well known to those of skill in the art such as photo lithography, etching, and black oxide treatment（黒化処理）of thin layers of copper. Insulating layers 214 and conductive trace layers 212 are laminated（積層）together with epoxy resin (not shown). Conductive vias or plated through holes 220 can then be drilled, or laser ablated（除去）, and plated to form conductors for electrical connections between the various conductive trace layers 212."
Laser ablation, Wikipedia
