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OpenSPARC 2005 Spec: Update (Hyperprivileged Ed)

2006-02-11 | SuperComputer
UltraSPARC Architecture 2005 Specificationがアップデートされました (ただしまだドラフトです):

OpenSPARC > OpenSPARC T1
 OpenSPARC T1 Documents
 http://opensparc.sunsource.net/nonav/opensparct1.html
 "UltraSPARC Architecture 2005 Specification (Privileged Edition)",
  Sun Microsystems, Inc., Draft D0.8.3, 7 Feb 2006.
  550ページ (約 3MByte)
 "UltraSPARC Architecture 2005 Specification (Hyperprivileged Edition)",
  Sun Microsystems, Inc., Draft D0.8.3, 7 Feb 2006.
  660ページ (約 3.5MByte)

 "The Privileged edition of this document (~550 pages) describes the full Nonprivileged
  (application software) and Privileged (operating system software) levels of the architecture.
  Download it if you are writing application software, writing a code generator,
  or writing/porting operating system software to run on top of existing Hypervisor
  firmware (such as on a SunFire T1000 or T2000 system)."

 "The Hyperprivileged edition of this document (~660 pages) describes the Nonprivileged,
  Privileged, and Hyperprivileged (hypervisor/virtual machine firmware) levels of
  the architecture. Download it if you are writing hyperprivileged firmware ("Hypervisor" code)
  or designing your own processor based on OpenSPARC."

"UltraSPARC T1 supplement to UltraSPARC Architecture 2005 Specification (Privileged)"
 Draft 1.8.2, 24 Jan 2006.
"UltraSPARC T1 Hypervisor API Specification",
 Revision 1.0, January 24, 2006.
の更新はありません。


Hyperprivilegedと Hypervisorは Chapter3: Definitionsで以下のように分けられています:
 hyperprivileged (software)
  Software executing while the processor is in hyperprivileged state.
 hyperprivileged (state)
  The highest processor privilege state (defined by HPSTATE.hpriv = 1), in which
  all processor features are accessible.
 hypervisor (software)
  A layer of software that executes in hyperprivileged processor state. One
  purpose of hypervisor software (also referred to as "the hypervisor") is to
  provide greater isolation between operating system ("supervisor") software
  and the underlying processor implementation.


UltraSPARC Architecture 2005ですが、1994年にに公開された 64-bit SPARC V9 architecture
に対して以下の Sunの拡張が追加されています (Chapter1: 1.1 What's New?):
 the VIS 1 and VIS 2 instruction sets and GSR register
 multiple levels of global registers, controlled by the GL register
 MMU architecture
 the new Hyperprivileged mode
 Chip-level Multithreading (CMT) architecture
上記はどちらも "UltraSPARC Architecture 2005 Specification (Hyperprivileged Edition)" より。

VISや CMTまで含めていますので、 SPARC International, Inc: http://www.sparc.org/
が策定する仕様との関係は???


また、
OpenSPARC Publications
 http://opensparc.sunsource.net/nonav/pubs.html
にて、
"A Power-Efficient High-Throughput 32-Thread SPARC Processor",
 Ana Sonia Leon, et al.,
 IEEE International Solid State Circuit Conference(ISSCC '06), 2006
が (プレゼンテーション資料ともに) 公開されました。


※[06/02/12]
SPARC V9 architecture (1994) と今回の UltraSPARC Architecture 2005仕様との間に
Sunと富士通との共同で以下の仕様書が公開されていました:
 SPARC Joint Programming Specification 1
 http://www.fujitsu.com/global/support/computing/server/unix/documents/
 "This document describes the instruction set architecture of the SPARC64™ V
  microprocessor. Based on SPARC V9 architecture, an open standard developed and
  distributed by SPARC International, Inc., it was jointly developed by Fujitsu and
  Sun Microsystems, Inc. as an architectural extension common to the high-end
  SPARC microprocessors of both companies."

  "SPARC Joint Programming Specification (JPS1): Commonality",
   Sun Microsystems, Inc. and Fujitsu Limited, Release 1.0.4, 31 May 2001.
   "Describes specifications common to Fujitsu's SPARC64™ V and
    Sun's UltraSPARC III microprocessors."
  "SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V",
   Fujitsu Limited, Release 1.0, July 2002.
   "Describes the features that are unique to SPARC64™ V."


関連 (元) エントリー:
 UltraSPARC Architecture 2005, T1 Hypervisor API, 2006-01-26


※[06/02/15]続報
 OpenSPARC 2005 Spec:Update(T1 Hyperprivileged Ed), 2006-02-15


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