Simply RISC S1: Free 64-bit single-core OpenSPARC

[06/09/25]
"Free processor firm discloses business plans", EE Times Europe, 09/18/2006
　http://www.eetimes.com/news/semi/showArticle.jhtml;jsessionid=GNHSC1YSLZTIGQSNDLOSKH0CJUNN2JVN?articleID=193001498
　"Simply RISC, a team of engineers formerly with STMicroelectronics NV, has revealed plans
　 to provide design services around its offering of a free 64-bit processor core."

個人的に、とっても気になった一節
　"Fazzino himself worked for ST in Catania, Sicily, between 1998 and 2001 in the group which
　 developed the ST20 and ST40 processors. The group was formed as a result of the acquisition,
　 in 1989 of Inmos Ltd., a U.K. semiconductor company based in Bristol, England, and well-known
　 for having developed a parallel processor known as the transputer."

Transputerが予定通り進んでいたら・・・
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[06/09/11]
OpenSPARC T1から Sigle-coreだけ取り出した：Simply RISC S1プロジェクトが公開されています：

Simply RISC ships the S1 Core
　http://www.srisc.com/
　The latest S1 Core specification (version 0.1)
　　http://www.srisc.com/?s1
　S1 Core downloads
　　http://www.srisc.com/?download

"Simply RISC creates single-core, S1, from OpenSPARC T1", Dwayne Lee, Sep 07, 2006
　http://blogs.sun.com/dwaynelee/entry/simply_risc_creates_single_core
"Free 64-bit single-core OpenSPARC processor core emerges", LinuxDevices.com, Sep. 07, 2006
　http://www.linuxdevices.com/news/NS4310115400.html

S1 Core
　From Wikipedia, the free encyclopedia
　http://en.wikipedia.org/wiki/S1_Core
　The major differences between T1 and S1 include:
　　S1 Core only has one 64-bit SPARC Core
　　S1 Core adds a Wishbone bridge, a reset controller and a basic interrupt controller
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関連エントリー：
　OpenSPARC T1 Version 1.3 Released, Sep 01, 2006, 2006-09-11