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RX210でRS232Cを使う

2015-10-15 17:57:35 | RX210
ルネサス製のRX210マイコンのSCI0を使用したシリアル通信プログラムのサンプルです。
割込みは使用していません。

  1. #include "iodefine.h"
  2. #include <stdio.h>
  3. #include <machine.h>
  4. /*
  5.  * SCI0初期化
  6.  * 57600bps: 8bit: stop bit 1: Parity none
  7.  * PCLK 25MHz
  8.  */
  9. void SCI_Init (void)
  10. {
  11.     /* ---- SCI interrupt request is disabled ---- */
  12.     IR(SCI0,ERI0) = 0;
  13.     IR(SCI0,RXI0) = 0;
  14.     IR(SCI0,TXI0) = 0;
  15.     IR(SCI0,TEI0) = 0;
  16.     /* ---- Initialization of SCI ---- */
  17.     /* PRCR - Protect Register
  18.     b15:b8 PRKEY - PRC Key Code - A5h (The write value should be A5h to permission writing PRCi bit)
  19.     b7:b4 Reserved - The write value should be 0.
  20.     b1 PRC1 - Protect Bit 1 - Write enabled */
  21.     SYSTEM.PRCR.WORD = 0xA502;
  22.     /* The module stop state of SCIn is canceled */
  23.     MSTP(SCI0) = 0;
  24.     /* Enable write protection */
  25.     SYSTEM.PRCR.WORD = 0xA500;
  26.     /* SCR - Serial Control Register
  27.     b7 TIE - Transmit Interrupt Enable - A TXI interrupt request is disabled
  28.     b6 RIE - Receive Interrupt Enable - RXI and ERI interrupt requests are disabled
  29.     b5 TE - Transmit Enable - Serial transmission is disabled
  30.     b4 RE - Receive Enable - Serial reception is disabled
  31.     b2 TEIE - Transmit End Interrupt Enable - A TEI interrupt request is disabled */
  32.     SCI0.SCR.BYTE = 0x00;
  33.     while (0x00 != (SCI0.SCR.BYTE & 0xF0))
  34.     {
  35.         /* Confirm that bit is actually 0 */
  36.     }
  37.     /* ---- Set the I/O port functions ---- */
  38.     /* Set port output data - High level */
  39.     PORT2.PODR.BIT.B0 = 1;
  40.     /* Set port direction - TXDn is output port, RXDn is input port */
  41.     PORT2.PDR.BIT.B0 = 1;
  42.     PORT2.PDR.BIT.B1 = 0;
  43.     /* Set port mode - Use pin as general I/O port */
  44.     PORT2.PMR.BIT.B1 = 0;
  45.     PORT2.PMR.BIT.B0 = 0;
  46.     /* PWPR - Write-Protect Register
  47.     b7 B0WI - PFSWE Bit Write Disable - Writing to the PFSWE bit is enabled
  48.     b6 PFSWE - PFS Register Write Enable - Writing to the PFS register is enabled
  49.     b5:b0 Reserved - These bits are read as 0. The write value should be 0. */
  50.     MPC.PWPR.BIT.B0WI = 0;
  51.     MPC.PWPR.BIT.PFSWE = 1;
  52.     /* PFS - Pin Function Control Register
  53.     b3:b0 PSEL - Pin Function Select - RXDn, TXDn */
  54.     MPC.P20PFS.BYTE = (0x0A);
  55.     MPC.P21PFS.BYTE = (0x0A);
  56.     /* Enable write protection */
  57.     MPC.PWPR.BIT.PFSWE = 0;
  58.     MPC.PWPR.BIT.B0WI = 1;
  59.     /* Use pin as I/O port for peripheral functions */
  60.     PORT2.PMR.BIT.B1 = 1;
  61.     PORT2.PMR.BIT.B0 = 1;
  62.     /* ---- Initialization of SCI ---- */
  63.     /* Select an On-chip baud rate generator to the clock source */
  64.     SCI0.SCR.BIT.CKE = 0;
  65.     /* SMR - Serial Mode Register
  66.     b7 CM - Communications Mode - Asynchronous mode
  67.     b6 CHR - Character Length - Selects 8 bits as the data length
  68.     b5 PE - Parity Enable - When transmitting : Parity bit addition is not performed
  69.                                           When receiving : Parity bit checking is not performed
  70.     b3 STOP - Stop Bit Length - 1 stop bits
  71.     b2 MP - Multi-Processor Mode - Multi-processor communications function is disabled
  72.     b1:b0 CKS - Clock Select - PCLK clock (n = 0) */
  73.     SCI0.SMR.BYTE = 0x00;
  74.     /* SCMR - Smart Card Mode Register
  75.     b6:b4 Reserved - The write value should be 1.
  76.     b3 SDIR - Transmitted/Received Data Transfer Direction - Transfer with LSB-first
  77.     b2 SINV - Transmitted/Received Data Invert - TDR contents are transmitted as they are.
  78.                                                           Receive data is stored as it is in RDR.
  79.     b1 Reserved - The write value should be 1.
  80.     b0 SMIF - Smart Card Interface Mode Select - Serial communications interface mode */
  81.     SCI0.SCMR.BYTE = 0xF2;
  82.     /* SEMR - Serial Extended Mode Register
  83.     b7:b6 Reserved - The write value should be 0.
  84.     b5 NFEN - Digital Noise Filter Function Enable - Noise cancellation function
  85.                                                               for the RXDn input signal is disabled.
  86.     b4 ABCS - Asynchronous Mode Base Clock Select - Selects 16 base clock cycles for 1-bit period
  87.     b3:b1 Reserved - The write value should be 0. */
  88.     SCI0.SEMR.BYTE = 0x00;
  89.     /* BRR - Bit Rate Register
  90.     Bit Rate: (25MHz/(64*2^(-1)*57600bps))-1=12.56 */
  91.     SCI0.BRR = 13;    /* 57600bps */
  92.     //SCI0.BRR = 40;    /* 19200bps */
  93.     /* ---- Initialization of SCI interrupt ---- */
  94.     /* SCI interrupt priority level is 1 */
  95.     IPR(SCI0, ) = 1;
  96.     /* Interrupt request is cleared (Edge interrupt) */
  97.     IR(SCI0,RXI0) = 0;
  98.     IR(SCI0,TXI0) = 0;
  99.     /* 送受信許可 */
  100.     SCI0.SCR.BIT.RIE = 1; //受信割込み
  101.     SCI0.SCR.BIT.TIE = 1; //送信割込み
  102.     SCI0.SCR.BIT.RE = 1;
  103.     SCI0.SCR.BIT.TE = 1;
  104. }
  105. /*
  106.  * データの送信
  107.  */
  108. void SCI_put(unsigned char c)
  109. {
  110.     //while(IR(SCI0,TXI0)==0) ;
  111.     if(c=='\r' || c=='\n') {
  112.         while(IR(SCI0,TXI0)==0) ;
  113.         IR(SCI0,TXI0) = 0;
  114.         SCI0.TDR = '\r';
  115.         while(IR(SCI0,TXI0)==0) ;
  116.         IR(SCI0,TXI0) = 0;
  117.         SCI0.TDR = '\n';
  118.     } else {
  119.         while(IR(SCI0,TXI0)==0) ;
  120.         IR(SCI0,TXI0) = 0;
  121.         SCI0.TDR = c;
  122.     }
  123. }
  124. /*
  125.  * データの受信
  126.  */
  127. /* SSR - Serial Status Register
  128. b7:b6 Reserved - The read value is undefined. The write value should be 1.
  129. b5 ORER - Overrun Error Flag - An overrun error has occurred
  130. b4 FER - Framing Error Flag - A framing error has occurred
  131. b3 PER - Parity Error Flag - A parity error has occurred */
  132. #define SSR_ERROR_FLAGS (0x38)
  133. int SCI_get (void)
  134. {
  135.     int c;
  136.     if((SCI0.SSR.BYTE & SSR_ERROR_FLAGS)!=0) {    // 受信エラー
  137.         c = SCI0.RDR;    //ダミーリード
  138.         SCI0.SSR.BYTE = (SCI0.SSR.BYTE & ~SSR_ERROR_FLAGS) | 0xC0;    //エラーフラグクリア
  139.         IR(SCI0,ERI0) = 0;
  140.         return -1;
  141.     }
  142.     while(IR(SCI0,RXI0) == 0) ;
  143.     c = SCI0.RDR;
  144.     IR(SCI0,RXI0) = 0;
  145.      return c;
  146. }
  147. /*
  148.  * printf関数で使用
  149.  */
  150. int _write(int file,char *ptr,int len)
  151. {
  152.     int i;
  153.     for(i=0;i<len;i++) {
  154.         SCI_put(ptr[i]);
  155.     }
  156.     return len;
  157. }
  158. /*
  159.  * scanf関数で使用
  160.  */
  161. int _read (int file, char *ptr, int len)
  162. {
  163.     *ptr = SCI_get();
  164.      return 1;
  165. }
  166. void change_oscillation_PLL(void)
  167. {
  168.     unsigned int i;
  169.     /* ---- Enable write protection ---- */
  170.     /* PRCR - Protect Register
  171.     b15:b8 PRKEY - PRC Key Code - A5h
  172.                   (The write value should be A5h to permission writing PRCi bit)
  173.     b7:b4 Reserved - The write value should be 0.
  174.     b3 PRC3 - Protect Bit 3 - Write disabled
  175.     b2 PRC2 - Protect Bit 2 - Write enabled
  176.     b1 PRC1 - Protect Bit 1 - Write enabled
  177.     b0 PRC0 - Protect Bit 0 - Write enabled */
  178.     SYSTEM.PRCR.WORD = 0xA507;
  179.     /* ---- Set the VRCR register ---- */
  180.     SYSTEM.VRCR = 0x00;
  181.     /* ---- Set the main clock oscillator drive capability ---- */
  182.     /* MOFCR - Main Clock Oscillator Forced Oscillation Control Register
  183.     b7 Reserved - The write value should be 0.
  184.     b6 MOSEL - Main Clock Oscillator Switch - Resonator
  185.     b5:b4 MODRV2 - Main Clock Oscillator Drive Capability Switch 2
  186.                       - 16 MHz to 20 MHz
  187.     b3:b1 MODRV - Main Clock Oscillator Drive Capability Switch
  188.                       - 16 MHz to 20 MHz non-lead type ceramic resonator
  189.     b0 Reserved - The write value should be 0. */
  190.     SYSTEM.MOFCR.BYTE = (0x30);    /* Drive capability : 20 MHz crystal resonator */
  191.     /* ---- Set wait time until the main clock oscillator stabilizes ---- */
  192.     /* MOSCWTCR - Main Clock Oscillator Wait Control Register
  193.     b7:b5 Reserved - The write value should be 0.
  194.     b4:b0 MSTS - Main Clock Oscillator Waiting Time
  195.                       - Wait time is 131072 cycles (approx. 6.55 ms). */
  196.     SYSTEM.MOSCWTCR.BYTE = (0x0D);    /* Wait control register : 131072 cycles (approx. 6.55 ms) */
  197.     /* ---- Operate the main clock oscillator ---- */
  198.     /* MOSCCR - Main Clock Oscillator Control Register
  199.     b7:b1 Reserved - The write value should be 0.
  200.     b0 MOSTP - Main Clock Oscillator Stop - Main clock oscillator is operating. */
  201.     SYSTEM.MOSCCR.BYTE = 0x00;
  202.     while (0x00 != SYSTEM.MOSCCR.BYTE)
  203.     {
  204.         /* Confirm that the written value can be read correctly. */
  205.     }
  206.     /* ---- Wait processing for the clock oscillation stabilization ---- */
  207.     for(i=0;i<100;i++) nop();
  208.     /* ---- Set the PLL division ratio and multiplication factor ---- */
  209.     /* PLLCR - PLL Control Register
  210.     b15:b13 Reserved - The write value should be 0.
  211.     b12:b8 STC - Frequency Multiplication Factor Select
  212.                       - Frequency multiplication factor is multiply-by-10.
  213.     b7:b2 Reserved - The write value should be 0.
  214.     b1:b0 PLIDIV - PLL Input Frequency Division Ratio Select
  215.                       - PLL input division ratio is divide-by-2. */
  216.     SYSTEM.PLLCR.WORD = (0x0901);    /* Division ratio and multiplication factor : divide-by-2, multiply-by-10 */
  217.     /* ---- Set wait time until the PLL clock oscillator stabilizes ---- */
  218.     /* PLLWTCR - PLL Wait Control Register
  219.     b7:b5 Reserved - The write value should be 0.
  220.     b4:b0 PSTS - PLL Waiting Time
  221.                       - Wait time is 65536 cycles (approx. 655.36 us). */
  222.     SYSTEM.PLLWTCR.BYTE = (0x09);    /* Wait control register : 65536 cycles (approx. 655.36 us) */
  223.     /* ---- Operate the PLL clock oscillator ---- */
  224.     /* PLLCR2 - PLL Control Register 2
  225.     b7:b1 Reserved - The write value should be 0.
  226.     b0 PLLEN - PLL Stop Control - PLL is operating. */
  227.     SYSTEM.PLLCR2.BYTE = 0x00;
  228.     /* ---- Wait processing for the clock oscillation stabilization ---- */
  229.     for(i=0;i<100;i++) nop();
  230.     /* ---- Set the operating power control mode ---- */
  231.     /* OPCCR - Operating Power Control Register
  232.     b7:b5 Reserved - The write value should be 0.
  233.     b4 OPCMTSF - Operating Power Control Mode Transition Status Flag
  234.     b3 Reserved - The write value should be 0.
  235.     b2:b0 OPCM - Operating Power Control Mode Select - High-speed operating mode */
  236.     SYSTEM.OPCCR.BYTE = (0x00); /* High-speed operating mode */
  237.     while (0 != SYSTEM.OPCCR.BIT.OPCMTSF)
  238.     {
  239.         /* Confirm that the operation power control mode transition completed. */
  240.     }
  241.     /* ---- Set the internal clock division ratio ---- */
  242.     /* SCKCR - System Clock Control Register
  243.     b31:b28 FCK - FlashIF Clock(FCLK) Select - divide-by-4
  244.     b27:b24 ICK - System Clock (ICLK) Select - divide-by-2
  245.     b23 PSTOP1 - BCLK Pin Output Control - disabled. (Fixed high)
  246.     b22:b20 Reserved - The write value should be 0.
  247.     b19:b16 BCK - External Bus Clock (BCLK) Select - divide-by-4
  248.     b15:b12 Reserved - The write value should be 0001b.
  249.     b10:b8 PCLKB - Peripheral Module Clock B(PCLKB) Select - divide-by-4
  250.     b7:b4 Reserved - The write value should be 0001b.
  251.     b3:b0 PCLKD - Peripheral Module Clock D(PCLKD) Select - divide-by-2 */
  252.     SYSTEM.SCKCR.LONG = 0x21821211;    /* ICLK,PCLKD: divide-by-2 PCLKB,BCLK,FCLK: divide-by-4 */
  253.     while (0x21821211 != SYSTEM.SCKCR.LONG)
  254.     {
  255.          /* Confirm that the written value can be read correctly. */
  256.     }
  257.     /* ---- Set the BCLK pin output ---- */
  258.     /* BCKCR - External Bus Clock Control Register
  259.     b7:b1 Reserved - The write value should be 0.
  260.     b0 BCLKDIV - BCLK Pin Output Select - divide-by-2 */
  261.     SYSTEM.BCKCR.BYTE = 0x01;
  262.     while (0x01 != SYSTEM.BCKCR.BYTE)
  263.     {
  264.         /* Confirm that the written value can be read correctly. */
  265.     }
  266.     /* ---- Set the internal clock source ---- */
  267.     /* SCKCR3 - System Clock Control Register 3
  268.     b15:b11 Reserved - The write value should be 0.
  269.     b10:b8 CKSEL - Clock Source Select - PLL circuit is selected.
  270.     b7:b1 Reserved - The write value should be 0. */
  271.     SYSTEM.SCKCR3.WORD = (0x0400);    /* PLL */
  272.     while ((0x0400) != SYSTEM.SCKCR3.WORD)
  273.     {
  274.         /* Confirm that the written value can be read correctly. */
  275.     }
  276.     /* ---- Disable write protection ---- */
  277.     /* PRCR - Protect Register
  278.     b15:b8 PRKEY - PRC Key Code - A5h
  279.                   (The write value should be A5h to permission writing PRCi bit)
  280.     b2 PRC2 - Protect Bit 2 - Write disabled
  281.     b1 PRC1 - Protect Bit 1 - Write disabled
  282.     b0 PRC0 - Protect Bit 0 - Write disabled */
  283.     SYSTEM.PRCR.WORD = 0xA500;
  284. }
  285. void main(void)
  286. {
  287.     int buf;
  288.     change_oscillation_PLL();            //クロックソースPLL
  289.     SCI_Init ();
  290.     _write(0,"RS232C test program\n",20);
  291.     _write(0,"use SCI0\n",9);
  292.     while(1) {
  293.         buf = SCI_get();
  294.         SCI_put(buf);
  295.     }
  296. }

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pclkの設置について (張)
2018-01-11 11:04:14
07. b10:b8 PCLKB - Peripheral Module Clock B(PCLKB) Select - divide-by-4
08. b7:b4 Reserved - The write value should be 0001b.
236. b3:b0 PCLKD - Peripheral Module Clock D(PCLKD) Select - divide-by-2 */
237. SYSTEM.SCKCR.LONG = 0x21821211; /* ICLK,PCLKD: divide-by-2 PCLKB,BCLK,FCLK: divide-by-4 */

この記事を読むと、助けてくださって、ありがとうございました。一つの不明点があるのが。ビットレートを設置したいとき、pclkを事前設定することが必要です。RX210として、pclkb、pclkdがあります。シリアル通信なら、このpclkはpclkbですか?もしこのこのpclkはpclkbだったら。例えば使うクリックは内部50Mクリクなら、私はsckcrレジスタでpckb b11-b8 2分周を設定し、この時pclkbは25Mになりました。そして、シリアルモードレジスタb1-b0 CKSは4分周を設置したら、pclkbは6.25Mになりますか?この6.25Mのpclkbはpclkですか?この6.25Mはビットレートを決定しますか?教えていただければいいですか

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